Communication apparatus for reassembling packets received from network into message
US5113392A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Jun 18, 1990 |
| Grant date | May 12, 1992 |
| Priority date | — |
| Expiry date | Jun 18, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/252
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In a network having a plurality of node apparatus connected to a transmission line, each node apparatus segmenting a transmission message into information blocks of a predetermined length and transmitting them to the transmission line in the form of a fixed length packet (cell) having a source address, each node apparatus sequentially stores packets having different source addresses in vacant memory blocks of a buffer memory. There is written in each memory block the packet data as well as a next address pointer indicating a memory block in which the next received packet having the same source address is stored. When a packet containing the last information block of a message is received, stored in a read address queue is the address indicating the memory block which stores the first information block of the same packet. Reading the first block of a message from the buffer memory is executed in accordance with an address read from the read address queue, and reading the following blocks is executed in accordance with the next address pointer. Read/write of the buffer memory is alternately executed in units of memory block.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.