Apparatus and method for inspection and alignment of semiconductor chips and conductive lead frames
US5113565A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 6, 1990 |
| Grant date | May 19, 1992 |
| Priority date | — |
| Expiry date | Jul 6, 2010 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/53178
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method is described for aligning a contact pattern on an electronic device held by a first movable support, with a bond site pattern on a lead frame held by a second movable support. The method includes the steps of: (a) creating and storing models of a chip's contact pattern and a lead frame's bond site pattern; (b) imaging the electronic device and lead frame; (c) determining the position of contacts on said electronic device and reorienting the contact pattern model to a best fit with the imaged contact position; (d) determining the position of each bond site on the imaged lead frame and reorienting the bond site model to a best fit with the imaged bond site position; (e) determining positional differences between the reoriented lead frame and contact pattern models; and (f) generating signals to reorient the first and second movable supports to minimize the positional differences when they are moved into a bonding positon. A machine is described for performing the above method wherein each of three main movable elements of the machine is assigned a dimensional axis in which its travel is non-adjustable, so that other movable elements can be calibrated thereagainst.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.