Differential stage comprising MESFETS
US5115153A · kind A · utility
1Cited by
5References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 16, 1989 |
| Grant date | May 19, 1992 |
| Priority date | — |
| Expiry date | Jun 16, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/356043
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated semiconductor circuit made up of a differential stage which comsists of a differential pair of field effect transistors (10, 11) having outputs (34, 35) which are coupled to the inputs of an output stage or sub-circuit (31, 32, 51, 52) for controlling same, and also including a load circuit (R.sub.4, R.sub.3). The circuit provides smoothing means for smoothing fluctuations of an output impedance of the differential transistor pair (10,11) during switching thereof.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.