Anti-aliasing dithering method and apparatus for low frequency signal sampling
US5115189A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 6, 1991 |
| Grant date | May 19, 1992 |
| Priority date | — |
| Expiry date | Feb 6, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R13/345
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method and apparatus is disclosed to prevent aliasing while sampling a low frequency analog input signal. A clock produces a series of electrical pulses at a predetermined frequency F.sub.o. An analog-to-digital ("A/D") converter samples the input signal at each clock pulse. Sample selection means randomly select one clock pulse from each successive series of N clock pulses, where N is a predetermined integer much greater than one. A memory receives the digital output values from the A/D converter, but only stores the current digital output value at each selected clock pulse. As a result, the long-term average frequency of sample storage is substantially equal to F.sub.o /N, but the interval between successive samples is random (i.e. the interval between successive samples is typically not equal to N clock pulses).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.