Method for manufacturing a junction field effect transistor
US5116773A · kind A · utility
2Cited by
3References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 26, 1990 |
| Grant date | May 26, 1992 |
| Priority date | — |
| Expiry date | Dec 26, 2010 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/944
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a method for manufacturing a field effect transistor which overcomes problems occurring in the manufacture of InP material junction field effect transistors. Because the electron saturation velocity is higher than that of silicon or GaAs it is desirable to have a gate length shorter than the mask length as well as to have the source, drain, and gate metals evaporated by the self-aligned method. The present invention provides a method of achieving gate lengths of 1 .mu.m or shorter without requiring an expensive electron beam apparatus or X-ray lithography apparatus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.