Controller for disabling a data bus
US5118970A · kind A · utility
73Cited by
5References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 8, 1990 |
| Grant date | Jun 2, 1992 |
| Priority date | — |
| Expiry date | Dec 8, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4081
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A software controlled system having a signal source connected to logic circuits via data busses. User operated circuitry permits any selected data bus to be temporarily isolated from the signal source so that maintenance and/or logic circuit replacement may be performed on the isolated data bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.