CMOS output driver with transition time control circuit
US5120992A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 3, 1991 |
| Grant date | Jun 9, 1992 |
| Priority date | — |
| Expiry date | Jul 3, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00361
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A single resistance permits a CMOS driver to have output devices that controllably transition "fast off-slow on" and which are not simultaneously on while the driver switches states. The driver's output and supply currents contain reduced harmonics. The resistance is coupled to the gates of the output stage PMOS-NMOS devices, and forms an RC circuit with the intrinsic capacitance at the gates, extending the turn-on transition of the gate drive voltages. Each output device then turns on relatively slowly, but turns off normally. The output current transition times are essentially determined by the resistance and intrinsic capacitances. The resistance is implemented using polysilicon or diffusion, and preferably has a magnitude ten times the on-channel resistance of the input PMOS and NMOS devices driving the output stage. Because the resistance and intrinsic capacitances are essentially temperature and power supply voltage independent, and but slightly process dependent, the current output transition times can be controlled despite CMOS parameter variations. A 3-state embodiment of the CMOS buffer uses parallel coupled PMOS-NMOS devices to switchably couple in the resistance between…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.