BiCMOS voltage generator
US5120994A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 17, 1990 |
| Grant date | Jun 9, 1992 |
| Priority date | — |
| Expiry date | Dec 17, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/20
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A bias network for providing the ECL reference voltages V.sub.REF1 and V.sub.REF2. Bipolar npn transistors are arranged to receive the collector terminal potentials of the emitter-coupled pair of the bias network. The npn transistors form the input devices of a differential amplifier that includes a pair of FETs arranged as a current mirror. One of each of such FETs is in series with each of the input transistors. The differential amplifier regulates the potential at an internal node of the bias network to thereby maintain the operating point of the network so that the potentials of the collector terminals are equal. As a result the bias network is rendered substantially insensitive to both temperature and supply voltage variations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.