Digital signal processing
US5121429A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 5, 1989 |
| Grant date | Jun 9, 1992 |
| Priority date | — |
| Expiry date | Jul 5, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/125
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
For more convenient mechanisation, the modulo m reduction of a binary number P can be carried out by conditionally summing the modulo m reductions of a power series of two and then modulo m reducing the sum. The modulo m reductions of the series, called the `residues` of the series, can be pre-calculated and stored but this may be inconvenient if they are long in terms of numbers of bits. Herein, the residues are calculated in sequence by a recursive process, each residue being calculated from the next preceeding one, this leading to a `serial` arrangement for generating the residues which can be incorporated into a serial modulo m reduction unit. Such a serial modulo m reduction unit is convenient for implementation as an integrated circuit especially as part of an overall circuit for encryption and decryption of digital signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.