Method of manufacturing a semiconductor device comprising capacitors which form memory elements and comprise a ferroelectric dielectric material having multilayer lower and upper electrodes
US5122477A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 25, 1991 |
| Grant date | Jun 16, 1992 |
| Priority date | — |
| Expiry date | Feb 25, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/696
Abstract
A method of manufacturing a semiconductor device comprising a semiconductor body (3) with a surface (10) on which capacitors (2) are provided, which form memory elements, with a lower electrode (11) including platinum, a ferroelectric dielectric material (12) and an upper electrode (13) is presented. In the method according to the invention, the electrodes (11, 13) including platinum are formed by the successive deposition on a surface of a first layer (19, 26) comprising a metal from the group titanium, zirconium, hafnium or an alloy of these metals, a second layer (20, 27) comprising platinum, and a third layer (21, 28) comprising a metal from the group titanium, zirconium, hafnium, or an alloy of these metals, upon which the semiconductor body is heated in an atmosphere containing oxygen. The first metal layer ensures a good adhesion of the electrode, the second layer acts as the electrode proper, while the third metal layer counteracts adverse effects of the first layer. Semiconductor devices having electrodes with good adhesion and a smooth surface can be manufactured in such a way. As a result, the semicondcutor device is reliable, while switching of the capacitors (2) acting…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.