Switching matrix crosspoint
US5126734A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 26, 1990 |
| Grant date | Jun 30, 1992 |
| Priority date | — |
| Expiry date | Jul 26, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/693
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A crosspoint for a switching matrix constituted by enhanced P-channel and N-channel MOS transistors. Each input line conductor (Ii1 and Ii2) is connected to an input of a first differential amplifier (M3, M4), each leg of which is associated by a current mirror circuit to a first current source (M9, M10, M11) enabled by a selection input (Sij) of the crosspoint. The outputs of the first differential amplifier are connected to a second differential amplifier (M1, M2) fed by a second current source (I) common to all the crosspoints of a same column. The outputs of the second differential amplifier are connected to the pair of conductors (Oj1, Oj2) of an output column, an extremity of this column being connected to the high voltage source (Vdd) through a resistor (R).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.