Synchronous array logic circuitry and systems
US5126950A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 16, 1990 |
| Grant date | Jun 30, 1992 |
| Priority date | — |
| Expiry date | Jan 16, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1738
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Synchronous array logic circuitry and a system for automatically laying out such circuitry for the fabrication of integrated circuits are described. The synchronous array logic circuitry includes as many cells as necessary to perform the desired functions with each cell including a transistor array for evaluating a Boolean function and supplying the result to a storage element through a multiplexer. The storage element latches the output signal and supplies it to other transistor arrays and/or other cells. The transistor array includes serially connected transistors for performing AND functions and parallel connected transistors for performing OR functions. The multiplexer operates under control of a test signal to configure the storage elements serially, thereby enabling complete testability of all cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.