Dram on-chip error correction/detection
US5127014A · kind A · utility
122Cited by
5References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 13, 1990 |
| Grant date | Jun 30, 1992 |
| Priority date | — |
| Expiry date | Feb 13, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1076
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Error detection or correction is provided on the same chip as DRAM memory. Because data and error correction bits need not travel on an external bus, error detection/correction can be conducted on a larger number of bits than the width of the data bus. When using memories which provide for access to a row of memory, such as static-column or fast-page mode memories, error correction is conducted on an entire row of memory during one error correction cycle. Following operations of the correction cycle, the data within a row of memory can be accessed independently of the EC circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.