Method and apparatus for automatic memory configuration by a computer
US5129069A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 24, 1989 |
| Grant date | Jul 7, 1992 |
| Priority date | — |
| Expiry date | Jan 24, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4239
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system includes a memory unit with plural addressable storage locations, a connector arrangement for detachably electrically coupling the memory unit to a computer, and a decoding arrangement for determining whether a computer memory address is within a range of addresses to which the memory unit is to respond, the decoding arrangement including a base address register storing a value representing the first address in the range and a size register defining the number of addresses in the range. A method by which a computer can automatically configure this system includes the steps of determining a base address to be associated with the connector, loading into the base address register a value representing the base address, loading into the size register a value representing the maximum range of addresses, thereafter selectively accessing storage locations to determine the actual number of contiguous locations in the memory unit, and then changing the size register, when the actual number of locations is less than the maximum range of addresses, to a value representing the actual number of locations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.