Method for improved code generation in reduced instruction set computers
US5133072A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 13, 1986 |
| Grant date | Jul 21, 1992 |
| Priority date | — |
| Expiry date | Nov 13, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/447
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for efficient generation of complied code is presented. In order to gain significant performance advantage with a minimum of code expansion, out-of-line code sequences are used. An out-of-line code sequence is a series of instructions that are invoked by a simplified calling mechanism in which almost no state-saving is required. Additionally, out-of-line code sequences is designed so that a single copy can exist on a system and all processes running on that system can access it. A series of out-of-line code sequences can be generated, each member of the series being tailored to a particular combination of compile-time information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.