High speed sampling and digitizing system requiring no hold circuit
US5134403A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 6, 1990 |
| Grant date | Jul 28, 1992 |
| Priority date | — |
| Expiry date | Dec 6, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/1245
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Disclosed is an analog to digital conversion system that converts high speed analog signals to digital values without using a hold circuit. The system has a narrow aperture sampling circuit that samples an input signal and feeds the sampled signal to a capacitor. A resistor in parallel with the capacitor discharges the capacitor at a predetermined rate, thus the capacitor does not hold the sampled signal. The discharging signal output of the capacitor-resistor circuit is amplified and then filtered using a low-pass filter, which has essentially linear phase shift and no undershoot. The filtered signal is then amplified and fed to a flash analog to digital converter which converts the signal into a digital value. The low-pass filter creates a Gaussian output and the converter is timed to convert the signal at the peak of the filter output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.