Lead frame for semiconductor device
US5134459A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 1, 1991 |
| Grant date | Jul 28, 1992 |
| Priority date | — |
| Expiry date | Mar 1, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A lead frame for a high-density, sealed type of semiconductor device having many input/output pins and capable of high-speed operation is made of a magnetic material with a covering layer of a non-magnetic metal. The covering layer covers a top surface, a bottom surface, both side surfaces and an inner end face of a portion of the leads of the lead frame which is to be sealed in a semiconductor package. The covering layer has a thickness of 1 micron or more at both side surfaces of each lead. Therefore, the inductance at the leads can be reduced remarkably. Thus, the semiconductor can be operated at a high speed with improved reliability.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.