Method and apparatus for constant stride accessing to memories in vector processor
US5134695A · kind A · utility
14Cited by
21References
10Claims
0Family size
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Key dates
| Filing date | Nov 21, 1990 |
| Grant date | Jul 28, 1992 |
| Priority date | — |
| Expiry date | Nov 21, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0607
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for generating addresses for a constant stride vector addressed memory device. An address generator generates address indices following an equation EQU c.D=1(mod B) where B is the bank number of the memory device, D is the stride of the vector addressed memory device and c is a positive integer corresponding in a delta index. By doing so, the requested addresses are successively generated in order of bank addresses of the memory device and, the waiting time of prior constant stride vector access methods is eliminated. And the throughput of the memory device is improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.