Superconducting sigma-delta analog-to-digital converter
US5140324A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 6, 1991 |
| Grant date | Aug 18, 1992 |
| Priority date | — |
| Expiry date | Jun 6, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/43
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A superconducting sigma-delta analog-to-digital converter utilizes a superconducting inductor as the integrator and a Josephson junction connected in series between the inductor and ground as the quantizer. A SQUID generates sampling pulses at a selected GHz frequency which add to the inductor current flowing through the Josephson junction. When the combined current through the Josephson junction exceeds the critical current of the Josephson junction, a voltage pulse is generated which kicks back into the inductor to reduce the inductor current. The voltage across the Josephson junction is, therefore, a one bit digital representation of the analog signal. This one bit digital signal is converted to a multi-bit digital signal preferably by a decimator having superconducting circuits which reduce the frequency of the multi-bit digital signal to a frequency which can be further processed by semiconductor processors. Preferably, a weighting function is utilized in a conversion to improve accuracy.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.