Data processing apparatus with self-emulation capability
US5140687A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 27, 1989 |
| Grant date | Aug 18, 1992 |
| Priority date | — |
| Expiry date | Sep 27, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T1/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A microprocessor, specially adapted for graphics processing applications, and which has a self-emulation capability by which the contents of its internal registers may be dumped or loaded to or from external memory on an instruction-by-instruction basis, is disclosed. The microprocessor has circuitry which is responsive to an emulate enable signal, or to a predetermined instruction code, so that normal execution is halted at the end of the ion, with execution jumping to a predetermined vector. Responsive to a dump signal, the microprocessor begins execution of a routine which presents a predetermined series of memory addresses on a memory bus, in conjunction with the contents of registers internal to the microprocessor. Accordingly, the addressed locations of a memory device connected to the memory bus can be written with the register contents, for subsequent interrogation by the user. Similarly, responsive instead to a load command, a routine is executed which presents the series of addresses to the memory bus and loads the internal registers with the data values presented on the memory bus. The load feature is similarly utilized by the user's loading of the addressed memory locat…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.