Method of making enhanced insulated gate bipolar transistor
US5141889A · kind A · utility
25Cited by
6References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 17, 1991 |
| Grant date | Aug 25, 1992 |
| Priority date | — |
| Expiry date | Jun 17, 2011 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/126
Abstract
An insulated gate bipolar device is formed on a multiple conductivity substrate. The multiple conductivity substrate comprises interspersed regions of N+ and P+ semiconductor material. In a preferred embodiment, the N+ and P+ regions are arranged in a checkerboard, mosaic pattern on a bottom side of the substrate. The P+ region serves to conductivity modulate an N epitaxial layer in which the IGBT structure is formed while the N+ regions improve low current conductivity, reduce minority carrier recombination time, and make an integral drain source diode accessible from the drain and source electrodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.