Serial memories operated for re-ordering samples
US5142488A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 22, 1990 |
| Grant date | Aug 25, 1992 |
| Priority date | — |
| Expiry date | Oct 22, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F17/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Serial memories are operated so as to reorder samples as they are serially supplied in a pipelined electronics system, such as one for performing matrix multiplications on a chain serial basis. A serial memory comprising (m-1) delay elements and a write multiplexer is operated so as to respond to data samples that occur every m.sup.th one of a series of consecutive sample intervals to generate successive groups of m successive samples, for example. As a further example, a serial memory comprising (mn-1) delay elements and a write multiplexer is operated so as to respond to every m.sup.th one of data samples supplied thereto, which said every m.sup.th data sample is in a first scanning order, to supply those every m.sup.th data samples in a second scanning order. The first scanning order may correspond to scanning in row major order a matrix of samples arranged in m rows and n columns, in which case the second scanning order corresponds to column major scanning order of that matrix of samples. Alternatively, the first scanning order may correspond to scanning in column major order a matrix of samples arranged in m rows and n columns, in which case the second scanning order correspon…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.