Monitor channel system in use with a recording apparatus
US5142675A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 1, 1990 |
| Grant date | Aug 25, 1992 |
| Priority date | — |
| Expiry date | Mar 1, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4812
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A monitor control system comprises an interrupt processor for executing regular monitor processing by a periodic interrupt occurring at a predetermined time interval, and a background processor for executing background processing, wherein when interruption occurs, execution of the background processing by the background processor is interrupted while regular monitor processing is executed during a period in which background processing is interrupted. The time-consuming background processing is treated as a low-level processing task, and the regular monitor processing, as a high-level processing task. The low-level processing task is executed as a background processing during CPU idle time. Interruption of the background processing occurs ever 10-msec, during which the high-level processing task is executed. Accordingly, background processing and regular monitor processing are smoothly executed, and the CPU is thereby efficiently used.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.