Method of fabricating buried insulating layers
US5143858A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 2, 1990 |
| Grant date | Sep 1, 1992 |
| Priority date | — |
| Expiry date | Apr 2, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/26533
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A thick buried insulating layer is formed by employing a multiple semiconductor layer growth/implant/anneal cycle. A first buried insulating layer is formed in a semiconductor substrate by implanting a dopant which reacts with the substrate to form an insulating layer and then annealing the substrate. Subsequently, a thin semiconductor layer is grown on the surface of the substrate. This is followed by a second implantation of the dopant which reacts with the substrate to form an insulating layer and an anneal to form a second buried insulating layer. The two buried insulating layers may be continuous to form a single, thick buried insulating layer or may be discontinuous to form two buried insulating layers separated by a semiconductor layer. The cycle may be repeated until a desirable thickness of the buried insulating layer is achieved or until a desirable number of buried insulating layers are formed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.