Semiconductor integrated circuit
US5144518A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 26, 1990 |
| Grant date | Sep 1, 1992 |
| Priority date | — |
| Expiry date | Jun 26, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/811
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit according to the present invention has a series circuit of a first field effect transistor and a load which is connected between a first potential point and a second potential point. The first field effect transistor operates in response to a control signal inputted in a gate thereof, whereby a high-level or low-level output signal is extracted from a node between the first field effect transistor and the load to output terminal. A second field effect transistor is also connected between the output terminal and the first potential point. Thus, when a surge causing the first field effect transistor to break down is applied to the output terminal, the second field effect transistor conducts to pass a surge current, whereby the first field effect transistor is prevented from being broken down.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.