Patent · US Expired

Convertible multi-function microelectronic logic gate structure and method of fabricating the same

US5146117A · kind A · utility

37Cited by
4References
17Claims
0Family size

Assignee

Inventor

Key dates

Filing dateApr 1, 1991
Grant dateSep 8, 1992
Priority date
Expiry dateApr 1, 2011

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A plurality of field effect transistors (FETS) (Q.sub.0 A to Q.sub.n-1 A, and Q.sub.0 B to Q.sub.n-1 B) are arranged in a structure (10) to normally perform a first logic function such as NAND. Selectively implanting the channel region (38) of at least one of the FETs (30) with sufficient ions of a predetermined ion species such that the respective FET (30) maintains a constant logic state (constantly turned ON or OFF) for all logical values of applied gate voltage converts the structure (10) to perform a second logic function such as NOR. Alternatively, one of the logic states may be "stuck high" (constant logical high output) or "stuck low" (constant logical low output). The channel implants are substantially undetectable, rendering the structure (10) highly resistant to reverse engineering.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.