Bi-CMOS logic gate circuits for low-voltage semiconductor integrated circuits
US5146118A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 1, 1991 |
| Grant date | Sep 8, 1992 |
| Priority date | — |
| Expiry date | Feb 1, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/09448
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A Bi-CMOS logic gate circuit according to the present invention comprises a complementary Bi-CMOS output circuit at the output stage composed of a first-polarity bipolar transistor and a second-polarity bipolar transistor, and a level compensation circuit, provided between the input and output terminals of the Bi-CMOS output circuit, which compensates for each forward-bias voltage between the base and emitter of the first-polarity and second-polarity bipolar transistors. This arrangement allows the Bi-CMOS output circuit to swing the output voltage from the voltage of the high-voltage supply to that of the low-voltage supply at the output stage, previously smaller in the amplitude by the amount equal to the sum of the base-emitter voltage of two bipolar transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.