Method and apparatus for conserving power in a data processing system
US5148380A · kind A · utility
26Cited by
5References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 27, 1990 |
| Grant date | Sep 15, 1992 |
| Priority date | — |
| Expiry date | Aug 27, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a battery powered data processing system having an oscillator and a microprocessor connected to the oscillator, the microprocessor has a programmable standby mode and circuit responsive to the standby mode for disabling the oscillator. The system uses a sensor circuit to generate a reset signal to reset the microprocessor from the power down mode when a key is depressed. A signal generator is responsive to signals from the oscillator for disabling the reset signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.