Interface for independently establishing a link and transmitting high level commands including logical addresses from dedicated microprocessor to shared intelligent memory
US5148527A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 22, 1989 |
| Grant date | Sep 15, 1992 |
| Priority date | — |
| Expiry date | Nov 22, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1663
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a shared memory system, wherein several memory users MU wish access to a plurality of memory banks, a set of high level commands (CREATE, PUT, GET, RELEASE) is provided, to transfer data between a given memory user and the memory banks or another memory user. The high level commands sent by the memory users are built up by memory interfaces MI connected to the memory users, and transmitted through an interconnection network to Packet Memory Command Executors PMCE integrated into each memory bank. The high level commands work with data records identified by Logical Record Addresses (LRA) known by the memory users. During execution of the high level commands by the PMCE, the LRA are translated into physical addresses corresponding to physical address space in the memory banks. The physical address space is created dynamically and released upon need, through the Create or Release Commands. A given memory user is not involved at all by management of physical address space, and works only with the LRA of a record.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.