Apparatus and method for data group coherency in a tightly coupled data processing system with plural execution and data cache units
US5148533A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 5, 1989 |
| Grant date | Sep 15, 1992 |
| Priority date | — |
| Expiry date | Jan 5, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0831
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a data processing system having a plurality of tightly coupled data processing units connected by an asynchronous system bus, apparatus and an associated method are described for maintaining the coherency of data groups stored in instruction cache units and execution cache units. The apparatus includes a monitor unit as part of the bus interface unit, and a bus interface unit coupling each associated data processing unit to the system bus. The monitor unit receives signals, applied to the system bus, identifying data groups transferred between the memory unit and the data processing units, including those data groups originating from the bus interface unit of which the monitor unit is a component. The bus interface unit includes directories duplicating the contents of the instruction cache unit directory and the execution cache unit directory. The monitor unit, in response to signals applied to the system bus, identifies operations that can compromise the integrity of signals stored in the associated data processing unit. The monitor unit accesses the appropriate duplicate directory to determine if the address of a compromised data group validly exists in the duplicate directory…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.