Printed-wireboard photoimaging
US5148765A · kind A · utility
14Cited by
3References
2Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 22, 1990 |
| Grant date | Sep 22, 1992 |
| Priority date | — |
| Expiry date | Feb 22, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/066
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An improvement in the preparation of printed circuits comprises inserting a deformable layer between the phototool or support layer, and the solder mask. The deformable layer provides a uniform, integral and relatively thin coating of solder mask over circuit components, and results in higher-quality solder joints and lower rejection rates for finished boards.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.