Ground bounce blocking output buffer circuit
US5149991A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 6, 1991 |
| Grant date | Sep 22, 1992 |
| Priority date | — |
| Expiry date | Jun 6, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00361
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An output buffer circuit incorporates a ground bounce blocking circuit which blocks transfer of ground bounce pulses from the output ground lead (GND,PGND) to the output (V.sub.OUT) for protecting quiet outputs tied to a common ground bus. A diode element (SD1,D1,ND1, NSC) is coupled in the sinking current path in series with the primary pulldown transistor element (N1,N1P) between the buffer circuit output (V.sub.OUT) and the ground rail (GND,PGND). The diode element is oriented for passing sinking current to the low potential ground rail and for blocking transfer of ground bounce pulses originating in the ground rail (GND,PGND) to the output. The ground rail may be bifurcated to provide a relatively noisy output ground lead (PGND) and a relatively quiet ground lead (QGND). The primary pulldown transistor element (N1P) is coupled to the relatively noisy output ground lead (PGND). A secondary pulldown transistor element (N1S) is also provided with the control nodes of the primary and secondary pulldown transistor elements (N1P),N1S) coupled to each other. The secondary pulldown transistor element (N1S) is coupled between the output (V.sub.OUT) and relatively quiet ground lead (QGND…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.