MOS folded source-coupled logic
US5149992A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 30, 1991 |
| Grant date | Sep 22, 1992 |
| Priority date | — |
| Expiry date | Apr 30, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/00
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In integrated circuitry having both analog and digital circuits fabricated on the same substrate, switching transients produced by the digital circuitry can propagate through the substrate and induce deleterious effects in the associated analog circuitry. Such switching transients are greatly minimized by a CMOS source-coupled current-steering differential logic topology. In the preferred embodiment, gain and level shifting functions are merged, and connections to the power bus are made through constant current sources.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.