Time division speech path apparatus
US5155728A · kind A · utility
8Cited by
6References
1Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 16, 1990 |
| Grant date | Oct 13, 1992 |
| Priority date | — |
| Expiry date | Jul 16, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/0623
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A time division speech path apparatus includes a frame synchronization detector, a pointer detector, a pointer inserting circuit, an address converter, a selector, and a demultiplexer. Pointers are set on highways so that a relationship between the time slots on the highways and addresses of the speech path memory at which the time slots are written is determined on the basis of the frame phases and pointer values of the respective highways. Data read out from the speech path control memory are converted into addresses in accordance with this relationship and are supplied as read addresses to the speech path memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.