Clock synchronization scheme for digital transmission
US5155746A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 8, 1990 |
| Grant date | Oct 13, 1992 |
| Priority date | — |
| Expiry date | Jan 8, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/12
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A clock synchronization scheme for synchronizing a remote terminal to a distantly located central office terminal. In order to obtain synchronization, the central office terminal repetitively transmits a frame which has in it only one synchronization bit located in a predetermined position. The remote terminal includes a voltage connected oscillator whose output is used to determine when the predetermined bit position should be received from the central office terminal. The remote terminal controls the frequency of the oscillator based on the phase and frequency difference between the actual received synchronization bit and the bit position that the terminal says that bit should be received in. Once synchronization is achieved, the central office terminal transmits in each frame a three bit window which includes the synchronization bit. The remote terminal then searches each frame for the three bit window as long as synchronization is maintained.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.