Unconditional wide branch instruction acceleration
US5155818A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 1988 |
| Grant date | Oct 13, 1992 |
| Priority date | — |
| Expiry date | Sep 28, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3804
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system for handling a branch instruction which requires branching from a current instruction of a first instruction sequence to the first instruction of a second instruction sequence. The branch instruction is fetched and the next instruction of the first sequence is fetched while the branch instruction is displacement formatted. The first instruction of the second sequence is fetched while such next instruction is displacement formatted and the branch instruction is executed. The second instruction of the second sequence is fetched while the first instruction is displacement formatted, but the next instruction of the first sequence is not executed so that an execution wait occurs. The third instruction of the second sequence is then fetched while the second instruction is displacement formatted and the first instruction is executed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.