Matched impedance vertical conductors in multilevel dielectric laminated wiring
US5157477A · kind A · utility
12Cited by
21References
7Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 18, 1991 |
| Grant date | Oct 20, 1992 |
| Priority date | — |
| Expiry date | Jan 18, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/09718
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Electrical impedance matching for through plane connections or vias in a multiplane laminated wiring structure is provided by arranging the vias in patterns conforming to a standard characteristic impedance configuration. The pattern may be a five wire configuration with four vias surrounding the fifth and repeated over the area of the plane.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.