High speed counter circuit
US5157701A · kind A · utility
9Cited by
4References
5Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 28, 1991 |
| Grant date | Oct 20, 1992 |
| Priority date | — |
| Expiry date | Mar 28, 2011 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P90/02
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A high speed counter employs a number of functional blocks, flexibly interconnected on a bus structure, to provide efficient and high speed implementation of arbitrary range measuring tasks. A set of independent counters blocks are connected by the bus structure to programmable comparator blocks which establish count thresholds. The output of the comparators are paired by switchable AND/OR blocks to create ranges. The division of functions by block and the interconnecting bus structure allows the structure of each counter to be effectively programmed to fit the application at hand.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.