Adaptive phase locked loop
US5159292A · kind A · utility
75Cited by
2References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 25, 1992 |
| Grant date | Oct 27, 1992 |
| Priority date | — |
| Expiry date | Feb 25, 2012 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S331/02
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A PLL system having a variable oscillator and apparatus for generating both phase and frequency error signals for controlling the variable oscillator, includes apparatus, responsive to the polarity of the frequency error signal, to selectively disconnect the frequency error signal from the variable oscillator when the PLL system approaches phase lock.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.