Double channel heterostructures
US5159421A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 28, 1991 |
| Grant date | Oct 27, 1992 |
| Priority date | — |
| Expiry date | Jun 28, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8164
Abstract
A semiconductive device includes a dual channel heterostructure in which a pair of quantum wells separated by a thin barrier layer have their band gaps shifted by applied gate voltages between overlap and non-overlap relationships. When the gaps are in an overlap relationship intraband tunneling through the barrier between the two quantum wells serves to introduce charge carriers in the channels to make them conducting. A specific embodiment uses quantum wells of indium arsenide and gallium antimonide in a host lattice of aluminum antimonide.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.