Semiconductor memory with a circuit for testing characteristics of flip-flops including selectively applied power supply voltages
US5159571A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | May 9, 1991 |
| Grant date | Oct 27, 1992 |
| Priority date | — |
| Expiry date | May 9, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/36
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A static random access memory (RAM) includes a data set circuit (DSC) coupled to pairs of load elements of memory cells to test the connection between a pair of load elements and a pair of memory nodes of each of the memory cells. The data set circuit responds to predetermined control signals and data to be set to the memory cells and supplies the predetermined voltage corresponding to such data to the pair of load elements. If the pair of load elements and the memory nodes of a memory cell are properly coupled, data of the memory cell will be inverted. Therefore, if the data of a memory cell is not inverted during the test, it can be quickly determined that a disconnection fault exists at that memory cell location.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.