Multi-screen generation circuit
US5161012A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 9, 1991 |
| Grant date | Nov 3, 1992 |
| Priority date | — |
| Expiry date | Jan 9, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N5/45
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
There is disclosed a multi-screen generating circuit capable of freely displaying on a main screen a plurality of multi-screens corresponding to 4 sub-screens, 9 sub-screens, 13 sub-screens and 16 sub-screens according to size of the main screen, the circuit also being capable of giving free choices in selecting any type of multi-screens regardless of the number of broadcasting channels which may differ from one region to another. The inventive subject to carry out the object of the invention includes: a command decoder 10, an address signal generator 20, a writing reference signal generation circuti(WRS) 30, a writing display controller 140, an analog-to-digital clock generator 188, a first multiplexer 60, a serial-parallel converter 50(SPC) 50, a write timing generator 70, a read timing generation circuit 80, a latch section 90, and a data multiplexer 100.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.