Patent · US Expired

Functional at speed test system for integrated circuits on undiced wafers

US5162728A · kind A · utility

38Cited by
28References
36Claims
0Family size

Assignee

Inventor

Key dates

Filing dateSep 11, 1990
Grant dateNov 10, 1992
Priority date
Expiry dateSep 11, 2010

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R31/316
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

A digital test system for functionally testing undiced ICs on wafers at relatively high test frequencies includes an improved probe card and interface assemblies. The probe card and interface assemblies each include a plurality of printed circuit boards laminated together as a single laminated structure. Equal length and equal impedance elongated micro strip test signal traces conduct the signals to and from a probe ring with a plurality of resilient probes physically and electrically in contact with the contact pads of the IC. Other circuit patterns includes a relatively large reference plane and a power plane of approximately equal size. The interface assembly performs selective I/O functions to electrically conduct input signals from a test signal generator to the probe card assembly and to electrically conduct response signals from the probe card assembly to the signal analyzer for determining the proper functionality of the IC. The printed circuit techniques assures a high degree of signal integrity, control over the signals at very high test frequencies, and efficiency in signal path routing.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.