Phase-locked loop with circuit for adjusting a phase comparator's output amplitude
US5164685A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 4, 1991 |
| Grant date | Nov 17, 1992 |
| Priority date | — |
| Expiry date | Apr 4, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/1077
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The object of the description is a phase-locked loop circuit in the form of an integrated circuit (IC) including in sequential connection a digital phase comparator, to the input of which is supplied a reference frequency (fref); a loop filter; and a voltage-controlled oscillator, from which a feedback branch is fed to the second input of the phase comparator. The voltage (.phi.V; .phi.R) of the pulses obtained from the digital phase comparator is disposed so as to be adjusted by limiting means so as to modify the bandwidth and rate of the loop. The adjustment of the voltage of the pulses can be carried out, e.g., by limiting the supply voltage of the phase comparator or by means of an exterior diode or transistor limiter (Q2, Q3). The circuit is usable e.g. in radiotelephone applications, in which loop rate is increased during channel switching.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.