Low contact resistance process
US5166095A · kind A · utility
9Cited by
3References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 14, 1990 |
| Grant date | Nov 24, 1992 |
| Priority date | — |
| Expiry date | Dec 14, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/28518
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process to reduce M1/N+ contact resistance includes a low temperature anneal step, after the aluminum interconnect is alloyed at 400.degree. C. During the low temperature anneal step, the temperature of the furnace tube is lowered from 400.degree. C. to 250.degree. C. over a period of two hours, after which the integrated circuit is annealed under nitrogen for a further period of one hour. Alternately, the low temperature anneal is performed in an oven filled with nitrogen for a period of two hours at 250.degree. C.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.