Neural network circuit
US5166539A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 8, 1991 |
| Grant date | Nov 24, 1992 |
| Priority date | — |
| Expiry date | Jul 8, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F18/2453
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A neural network circuit, in which a number n of weight coefficients (Wl-wn) corresponding to a number n of inputs are provided, subtraction circuits determine the difference between inputs and the weight coefficients in each input terminal, the result thereof is inputted into absolute value circuits, all calculation results of the absolute value circuts corresponding to the inputs and the weight coefficients are inputted into an addition circuit and accumulated, and this accumulation result determines the output value. The threshold value circuit, which determines the final output value, has characteristics of a step function pattern, a polygonal line pattern, or a sigmoid function pattern, depending on the object. In the case in which a neural network circuit is realized by means of digital circuits, the absolute value circuits can comprise simply EX-OR logic (exclusive OR) gates. Furthermore, in the case in which the input terminals have two input paths and two weight coefficients corresponding to each input path, the neuron circuits form a recognition area having a flexible shape which is controlled by the weight coefficients. Neuron circuits are widely used in pattern recognit…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.