Programmable DCVS logic circuits
US5166547A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 5, 1991 |
| Grant date | Nov 24, 1992 |
| Priority date | — |
| Expiry date | Jun 5, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A basic tree construction, from which differential cascode voltage switch (DCVS) circuits having variable logic personality can be formed, contains n (>2) rows of differentially associated semiconductor device pairs spanned by n pairs of complementary input conductor leads, and a load circuit coupled to drain terminals of devices in the nth row. The nth row contains 2 device pairs and each other row contains 2.sup.i-1 device pairs (i=1, 2, . . . , n-1). Connections between source and drain terminals of devices in successive rows are predefined from the 1st to the n-1st row and variably definable between the n-1st and nth rows. Connections between input conductors and device gate terminals are predefined in each row other than the nth row, and variably definable in the nth row. Upon selectively defining a set of variable connections relative to the n-1st and nth rows the logic personality of the tree is selected to conform to any one of all possible functions of n variables. Logic function personalization is established in one embodiment by altering materials at discrete points in a space between n-1st and nth rows. In another embodiment, personalization is established by altering s…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.