Digital circuitry for approximating sigmoidal response in a neural network layer
US5167008A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 29, 1991 |
| Grant date | Nov 24, 1992 |
| Priority date | — |
| Expiry date | Aug 29, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/063
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A plurality of neural circuits are connected in a neural network layer for generating their respective digital axonal responses to the same plurality of synapse input signals. Each neural circuit includes digital circuitry for approximating a sigmoidal response connected after respective circuitry for performing a weighted summation of the synapse input signals to generate a weighted summation result in digital form. In this digital circuitry the absolute value of the digital weighted summation result is first determined. Then, a window comparator determines into which of a plurality of amplitude ranges the absolute value of the weighted summation result falls. A digital intercept value and a digital slope value are selected in accordance with the range into which the absolute value of the weighted summation result falls. The absolute value of the digital weighted summation result is multiplied by the selected digital slope value to generate a digital product; and the digital intercept value is added to the digital product to generate an absolute value representation of a digital axonal response. The polarity of the weighted summation result is determined, and the same polarity is …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.