Method for fabricating a semiconductor device
US5169801A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 31, 1991 |
| Grant date | Dec 8, 1992 |
| Priority date | — |
| Expiry date | Dec 31, 2011 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/978
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a semiconductor device comprises the steps of forming an insulating layer by the CVD method on a main surface of a semiconductor substrate, fluidizing the insulating layer by heat treatment, unifying a thickness of the insulating layer, opening contact holes in desired points of the insulating layer, and forming conductor contacts for interconnection on the contact holes. The insulating layer is has a uniform thickness in any area on the semiconductor device, so that over-etching of the insulating layer in opening contact holes can be prevented, and the step coverage is well improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.