Fast buffer
US5170134A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 12, 1991 |
| Grant date | Dec 8, 1992 |
| Priority date | — |
| Expiry date | Jun 12, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/50
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A buffer circuit includes an input amplifier connected to receive an input signal and an output amplifier connected provide an output signal. A differential amplifier is connected to also receive the input and output signals and to provide an output related to the difference between the signals to maintain a desired relationship between the input and output signals. The buffer circuit can be configured so that the signal from the differential amplifier is provided either to the input or the output amplifier, and can be accomplished in either bipolar or BICMOS technologies. The combination of the open loop and differential type buffer amplifiers, retains the best features of both, with the excellent speed performance of the open loop circuit as well as the enhanced accuracy of the differential amplifier circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.